🔬 Dedicated electrical and computer engineer pursuing MSc at UIC with expertise in VLSI design, machine learning, and compute-in-memory architectures. Currently serving as a System Architect and Design Engineer Intern at Intel Corporation, where I design hardware cost model frameworks for digital compute-in-memory macros. My research focuses on energy-efficient memristor-based frameworks and analog acceleration of deep neural networks. With hands-on experience in full-chip physical design, RTL synthesis, and advanced EDA tools, I bridge the gap between theoretical research and practical implementation. Published author with 9+ peer-reviewed papers, I'm passionate about advancing the frontiers of neuromorphic computing and high-performance computing systems.
💼 Work Experience
👨💻 System Architect and Design Engineer Intern (Co-Op) | Intel Corporation
🌍 Santa Clara, CA
📅 Jul 2024 - present
Key Achievements
- Currently designing a hardware cost model framework to evaluate and explore design space for fully digital compute in memory macros.
👨💻 Graduate Research Assistant, AEON LAB | University of Illinois Chicago
🌍 Chicago, IL
📅 Aug 2021 - present
Key Achievements
- Designed an energy-efficient memristor-based framework for learn-in-memory training and inference in floating point precision for Deep Neural Networks.
- Contributed to designing a low-power and computationally efficient Analog framework for DNN Inference without ADC/DAC with frequency domain model compression.
- Contributed to designing an interface for the Recurrent attention model allowing for complex predictions to be made within a constant time and memory budget.
👨💻 Graduate Teaching Assistant | University of Illinois Chicago
🌍 Chicago, IL
📅 Aug 2021 - present
Key Achievements
- Conduct lab sessions, proctor exams, grade exam papers, and projects, and hold office hours for multiple courses.
- Courses include: Introduction to VLSI Design (ECE-467), Introduction to Embedded Systems (ECE-266), Digital Signal Processing (ECE-317), Computer Organization (ECE-366), Introduction to Logic Design (ECE-265).
👨💻 Visiting MSc Student | Fermi National Accelerator Laboratory
🌍 Chicago, IL
📅 Jan 2022 - May 2022
Key Achievements
- Designed a small ASIC layout in Cadence Virtuoso.
- Performed DRC and LVS checks.
👨💻 Associate PnR Engineer & Contractor Engineer | Neural Semiconductor Limited & Mythic AI
🌍 Dhaka, Bangladesh
📅 Oct 2020 - Jun 2021
Key Achievements
- Handled full-chip physical design (netlist to GDSII) of a 40nm AI chip with 500k instances, including floor planning, placement, clock tree synthesis, routing, timing, ECOs, and sign-off (DRC, LVS, LEC, ERC).
- Developed TCL scripts for automated pin and IP block placement; modified YAML for design automation.
👨💻 Associate PnR Engineer-Trainee | Neural Semiconductor Limited
🌍 Dhaka, Bangladesh
📅 Feb 2020 - Sep 2020
Key Achievements
- Trained in fabless semiconductor manufacturing processes.
- Performed RTL synthesis and physical implementation (RTL to GDSII) on 45nm blocks, optimizing for frequency and power (in-house projects).
- Automated flows and data parsing; created custom LEF, DEF, and Lib files using Bash, TCL, and Python.
- Completed Cadence courses on Genus Synthesis Solution and Innovus Implementation System.
🛠️ Skills
💻 Programming Languages
🎨 Parallel Programming
⚙️ Scripting Languages
🗄️ Eda Tools
☁️ Simulation Software
📚 Publications
TimeFloats: Train-in-Memory with Time-Domain Floating-Point Scalar Products
👥 Maeesha Binte Hashem, Benjamin Parpilon, Divake Kumar, Dinithi Jayasuria, and Amit Ranjan Trivedi
🏛️ 2025 38th International Conference VLSI Design (VLSID)
Single-Step Extraction of Transformer Attention with Dual-Gated Memtransistor Crossbars
👥 Nethmi Jayasinghe, Maeesha Binte Hashem, Dinithi Jayasuriya, Leila Rahimifard, Min-A Kang, Vinod K. Sangwan, Mark C. Hersam and Amit Ranjan Trivedi
🏛️ IEEE Electron Device Letters (EDL)
ADC/DAC free analog acceleration of deep neural networks with frequency transformation
👥 Nastaran Darabi, Maeesha Binte Hashem, Hongyi Pan, Ahmet Cetin, Wilfred Gomes, and Amit Ranjan Trivedi
🏛️ IEEE Transactions on VLSI Systems (TVLSI)
Towards Model-Size Agnostic, Compute-Free, Memorization-based Inference of Deep Learning
👥 Davide Giacomini, Maeesha Binte Hashem, Jeremiah Suarez, Swarup Bhunia and Amit Ranjan Trivedi
🏛️ 2024 37th International Conference VLSI Design (VLSID)
Memory-immersed collaborative digitization for area-efficient compute-in-memory deep learning
👥 Shamma Nasrin, Maeesha Binte Hashem, Nastaran Darabi, Benjamin Parpillon, Farah Fahim, Wilfred Gomes, Amit Ranjan Trivedi
🏛️ 2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)
Exploiting Programmable Dipole Interaction in Straintronic Nanomagnet Chains for Ising Problems
👥 Amit Ranjan Trivedi, Nastaran Darabi, Maeesha Binte Hashem and Supriyo Bandyopadhyay Trivedi
🏛️ 2023 24th International Symposium on Quality Electronic Design (ISQED)
Solving Boolean Satisfiability with Stochastic Nanomagnets
👥 Maeesha Binte Hashem, Nastaran Darabi, Supriyo Bandyopadhyay, and Amit Ranjan Trivedi
🏛️ 2020 29th International Conference on Electronics Circuit and Systems (ICECS)
Hardware Trojan Detection Using Slope of Path Delay Trend: Combination of Clock and DC Sweep
👥 Mahmudul Hasan, Sudipto Baul, Maeesha Binte Hashem, Hamidur Rahman
🏛️ 2020 11th International Conference on Electrical and Computer Engineering (ICECE)
Unmanned Floating Waste Collecting Robot
👥 Abir Akib, Faiza Tasnim, Disha Biswas, Maeesha Binte Hashem, Kristi Rahman, Arnab Bhattacharjee, Sheikh Anowarul Fattah
🏛️ 2019 IEEE Region 10 International Conference (TENCON)
🎓 Education
🎓 MSc in Electrical and Computer Engineering
🏛️ University of Illinois Chicago (UIC)
📅 Aug 2021 - May 2025
📍 Chicago, IL
✨ Achievements & Activities
- Graduate Research Assistant in AEON LAB
- Graduate Teaching Assistant for multiple ECE courses
- Research focus on machine learning, VLSI, and compute-in-memory architectures
🎓 Bachelor of Science (B.Sc) in Electrical and Electronic Engineering
🏛️ Bangladesh University of Engineering and Technology (BUET)
📅 Feb 2015 - Apr 2019
📍 Dhaka, Bangladesh
✨ Achievements & Activities
- Graduated with strong foundation in electrical and electronic engineering
- Completed comprehensive coursework in digital systems and microprocessors